Normal Computing
1 open Forward Deployed Engineer role at Normal Computing. Curated with comp bands.
Comp on the board: $180K–$325K.
On the board since Jul 2026 · still hiring
Our take
Why Normal Computing
The only FDE seat where you live inside SystemVerilog and UVM testbenches — a rare vertical almost no other forward-deployed engineer can touch.
- FDE type
- True forward-deployed
- Travel
- Medium
- Comp
- Competitive
- Stage
- Early-stage
A good fit if you're…
- Engineers with hardware / EDA / chip-design backgrounds
- People who want a vertical no one else can claim
- Candidates open to NY, SF, Copenhagen, Seoul or London
What they do
Normal Computing calls itself a 'frontier AI lab for silicon,' applying AI to electronic design automation (EDA) with the stated ambition of cutting chip-design cost dramatically. It embeds engineers with some of the world's largest chipmakers rather than selling a generic API.
What “forward deployed” means here
This is deployment work fused with deep hardware context: you operate inside customers' SystemVerilog and UVM verification environments, not a SaaS dashboard. The surface area is chip verification, which makes the role closer to specialized field engineering than to a typical enterprise FDE motion.
Comp & leveling
The board shows $180K–$325K, a wide competitive band that reflects how much the level depends on scarce hardware-plus-software experience. The ceiling is real for candidates who genuinely straddle both worlds.
Growth signals
Seats span New York, San Francisco, Copenhagen, Seoul and London — an unusually international footprint for an early company, signalling that the chipmaker customer base is global and the field org is being seeded across geographies from the start.
Analysis updated 2026-09-12
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